Due to an increased demand for highly integrated semiconductor memory devices, techniques of integrating more devices onto a small area have become strongly relied upon. The integration of many devices onto a small area involves downscaling the devices to be formed on a semiconductor substrate. However, the downscaling of the devices has a limit. The wavelength of a light source used in a photolithography process, which determines the dimensions of a device, is reaching technical limitations.
To overcome this drawback, a method of forming a self-aligned double pattern (SADP) technique has been developed. The technique may utilize the resolution capabilities of a photolithography apparatus to form a pattern with double the pitch of a conventional pattern. In the SADP process, a core (also called mandrel) pattern is formed on a substrate by a lithography and an etch process. Material is deposited on each side of the mandrel, and the mandrel is then removed, resulting in a pattern that is double the pitch of the mandrel pattern. The sidewall deposition material, also referred to as a spacer, generates metal isolation areas for metal layers. A block layer then follows to define additional metal isolation areas, which is also referred to as a block mask or trim mask. While SADP provides advantages over other known techniques such as Lithography-Etch-Lithography-Etch (LELE) processing, various design challenges still remain when using SADP for semiconductor fabrication.